Volume 2021, Issue 1

Published: 2020-12-03

Preface

CHES 2021 Artifact Review

Douglas Stebila

V–IX
- PDF
Preface to TCHES Volume 2021

Peter Schwabe, Elke De Mulder

I-IV
- PDF

Articles

Compact Dilithium Implementations on Cortex-M3 and Cortex-M4

Denisa O. C. Greconici, Matthias J. Kannwischer, Amber Sprenkels

1-24
- PDF
- Artifacts
Ranking Loss: Maximizing the Success Rate in Deep Learning Side-Channel Analysis

Gabriel Zaid, Lilian Bossuet, François Dassance, Amaury Habrard, Alexandre Venelli

25-55
- PDF
Fill your Boots: Enhanced Embedded Bootloader Exploits via Fault Injection and Binary Analysis

Jan Van den Herrewegen, David Oswald, Flavio D. Garcia, Qais Temeiza

56-81
- PDF
- Artifacts
Doppelganger Obfuscation — Exploring theDefensive and Offensive Aspects of Hardware Camouflaging

Max Hoffmann, Christof Paar

82-108
- PDF
The design of scalar AES Instruction Set Extensions for RISC-V

Ben Marshall, G. Richard Newell, Dan Page, Markku-Juhani O. Saarinen, Claire Wolf

109-136
- PDF
- Artifacts
Rapidly Verifiable XMSS Signatures

Joppe W. Bos, Andreas Hülsing, Joost Renes, Christine van Vredendaal

137-168
- PDF
DAPA: Differential Analysis aided Power Attack on (Non-) Linear Feedback Shift Registers

Siang Meng Sim, Dirmanto Jap, Shivam Bhasin

169-191
- PDF
Fault Injection as an Oscilloscope: Fault Correlation Analysis

Albert Spruyt, Alyssa Milburn, Łukasz Chmielewski

192-216
- PDF
Polynomial Multiplication in NTRU Prime Comparison of Optimization Strategies on Cortex-M4

Erdem Alkim, Dean Yun-Li Cheng, Chi-Ming Marvin Chung, Hülya Evkan, Leo Wei-Lun Huang, Vincent Hwang, Ching-Lin Trista Li, Ruben Niederhagen, Cheng-Jhih Shih, Julian Wälde, Bo-Yin Yang

217-238
- PDF
- Artifacts
The Area-Latency Symbiosis: Towards Improved Serial Encryption Circuits

Fatih Balli, Andrea Caforio, Subhadeep Banik

239-278
- PDF
- Artifacts
Side-Channel Analysis of the Xilinx Zynq UltraScale+ Encryption Engine

Benjamin Hettwer, Sebastien Leger, Daniel Fennes, Stefan Gehrer, Tim Güneysu

279-304
- PDF
Re-Consolidating First-Order Masking Schemes Nullifying Fresh Randomness

Aein Rezaei Shahmirzadi, Amir Moradi

305-342
- PDF
Keep it Unsupervised: Horizontal Attacks Meet Deep Learning

Guilherme Perin, Łukasz Chmielewski, Lejla Batina, Stjepan Picek

343-372
- PDF
Exploring Crypto-Physical Dark Matter and Learning with Physical Rounding Towards Secure and Efficient Fresh Re-Keying

Sébastien Duval, Pierrick Méaux, Charles Momin, François-Xavier Standaert

373-401
- PDF
Fixslicing AES-like Ciphers New bitsliced AES speed records on ARM-Cortex M and RISC-V

Alexandre Adomnicai, Thomas Peyrin

402-425
- PDF
- Artifacts
Redundant Code-based Masking Revisited

Nicolas Costes, Martijn Stam

426-450
- PDF
Concrete quantum cryptanalysis of binary elliptic curves

Gustavo Banegas, Daniel J. Bernstein, Iggy van Hoof, Tanja Lange

451-472
- PDF

Volume 2021, Issue 1

Preface

CHES 2021 Artifact Review

Preface to TCHES Volume 2021

Articles

Compact Dilithium Implementations on Cortex-M3 and Cortex-M4

Ranking Loss: Maximizing the Success Rate in Deep Learning Side-Channel Analysis

Fill your Boots: Enhanced Embedded Bootloader Exploits via Fault Injection and Binary Analysis

Doppelganger Obfuscation — Exploring theDefensive and Offensive Aspects of Hardware Camouflaging

The design of scalar AES Instruction Set Extensions for RISC-V

Rapidly Verifiable XMSS Signatures

DAPA: Differential Analysis aided Power Attack on (Non-) Linear Feedback Shift Registers

Fault Injection as an Oscilloscope: Fault Correlation Analysis

Polynomial Multiplication in NTRU Prime Comparison of Optimization Strategies on Cortex-M4

The Area-Latency Symbiosis: Towards Improved Serial Encryption Circuits

Side-Channel Analysis of the Xilinx Zynq UltraScale+ Encryption Engine

Re-Consolidating First-Order Masking Schemes Nullifying Fresh Randomness

Keep it Unsupervised: Horizontal Attacks Meet Deep Learning

Exploring Crypto-Physical Dark Matter and Learning with Physical Rounding Towards Secure and Efficient Fresh Re-Keying

Fixslicing AES-like Ciphers New bitsliced AES speed records on ARM-Cortex M and RISC-V

Redundant Code-based Masking Revisited

Concrete quantum cryptanalysis of binary elliptic curves

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