FaultDetective

Explainable to a Fault, from the Design Layout to the Software

Authors

  • Zhenyuan Liu Worcester Polytechnic Institute, Worcester, MA 01609, USA
  • Dillibabu Shanmugam Worcester Polytechnic Institute, Worcester, MA 01609, USA
  • Patrick Schaumont Worcester Polytechnic Institute, Worcester, MA 01609, USA

DOI:

https://doi.org/10.46586/tches.v2024.i4.610-632

Keywords:

Fault Attacks, Fault Injection, ASIC, Microcontroller, Embedded Software

Abstract

Hardware faults are a known source of security vulnerabilities. Fault injection in secure embedded systems leads to information leakage and privilege escalation, and countless fault attacks have been demonstrated both in simulation and in practice. However, there is a significant gap between simulated fault attacks and physical fault attacks. Simulations use idealized fault models such as single-bit flips with uniform distribution. These ideal fault models may not hold in practice. On the other hand, practical experiments lack the white-box visibility necessary to determine the true nature of the fault, leading to probabilistic vulnerability assessments and unexplained results. In embedded software, this problem is further exacerbated by the layered abstractions between the hardware (where the fault originates) and the application software (where the fault effect is observed). We present FaultDetective, a method to investigate the root-cause of fault injection from fault detection in software. Our main insight is that fault detection in software is only the end-point of a chain of events that starts with a fault manifestation in hardware and propagates through the micro-architecture and architecture before reaching the software level. To understand the fault effects at the hardware level, we use a scan chain, a low-level hardware test structure. We then use white-box simulation to propagate and observe hardware faults in the embedded software. We efficiently visualize the fault propagation across abstraction levels using a hash-tree representation of the scan chain. We implement this concept in a multi-core MSP430 micro-controller that redundantly executes an application in lock-step. With this setup, we observe the fault effects for several different stressors, including clock glitching and thermal laser stimulation, and explain the root-cause in each case.

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Published

2024-09-05

Issue

Section

Articles

How to Cite

FaultDetective: Explainable to a Fault, from the Design Layout to the Software. (2024). IACR Transactions on Cryptographic Hardware and Embedded Systems, 2024(4), 610-632. https://doi.org/10.46586/tches.v2024.i4.610-632