SoC Root Canal!
Root Cause Analysis of Power Side-Channel Leakage in System-on-Chip Designs
Keywords:side-channel analysis, design-time methodology, micro-architecture, root-cause analysis
Finding the root cause of power-based side-channel leakage becomes harder when multiple layers of design abstraction are involved. While side-channel leakage originates in processor hardware, the dangerous consequences may only become apparent in the cryptographic software that runs on the processor. This contribution presents RootCanal, a methodology to explain the origin of side-channel leakage in a software program in terms of the underlying micro-architecture and system architecture. We simulate the hardware power consumption at the gate level and perform a non-specific test to identify the logic gates that contribute most sidechannel leakage. Then, we back-annotate those findings to the related activities in the software. The resulting analysis can automatically point out non-trivial causes of side-channel leakages. To illustrate RootCanal’s capabilities, we discuss a collection of case studies.
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Copyright (c) 2022 Pantea Kiaei, Patrick Schaumont
This work is licensed under a Creative Commons Attribution 4.0 International License.