Towards a Formal Treatment of Logic Locking

Authors

  • Peter Beerel University of Southern California, Los Angeles, California
  • Marios Georgiou Galois, Inc., Portland, Oregon
  • Ben Hamlin Galois, Inc., Portland, Oregon
  • Alex J. Malozemoff Galois, Inc., Portland, Oregon
  • Pierluigi Nuzzo University of Southern California, Los Angeles, California

DOI:

https://doi.org/10.46586/tches.v2022.i2.92-114

Keywords:

Logic Locking, Security Definitions

Abstract

Logic locking aims to protect the intellectual property of a circuit from a fabricator by modifying the original logic of the circuit into a new “locked” circuit such that an entity without the key should not be able to learn anything about the original circuit. While logic locking provides a promising solution to outsourcing the fabrication of chips, unfortunately, several of the proposed logic locking systems have been broken. The lack of established secure techniques stems in part from the absence of a rigorous treatment toward a notion of security for logic locking, and the disconnection between practice and formalisms. We seek to address this gap by introducing formal definitions to capture the desired security of logic locking schemes. In doing so, we investigate prior definitional efforts in this space, and show that these notions either incorrectly model the desired security goals or fail to capture a natural “compositional” property that would be desirable in a logic locking system. Finally we move to constructions. First, we show that universal circuits satisfy our security notions. Second, we show that, in order to do better than universal circuits, cryptographic assumptions are necessary.

Downloads

Published

2022-02-15

How to Cite

Beerel, P. ., Georgiou, M., Hamlin, B., Malozemoff, A. J., & Nuzzo, P. (2022). Towards a Formal Treatment of Logic Locking. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2022(2), 92–114. https://doi.org/10.46586/tches.v2022.i2.92-114

Issue

Section

Articles