Automated Generation of Masked Hardware

Authors

  • David Knichel Ruhr University Bochum, Horst Görtz Institute for IT Security, Bochum, Germany
  • Amir Moradi Ruhr University Bochum, Horst Görtz Institute for IT Security, Bochum, Germany
  • Nicolai Müller Ruhr University Bochum, Horst Görtz Institute for IT Security, Bochum, Germany
  • Pascal Sasdrich Ruhr University Bochum, Horst Görtz Institute for IT Security, Bochum, Germany

DOI:

https://doi.org/10.46586/tches.v2022.i1.589-629

Keywords:

Side-Channel Analysis, Masking, Hardware, Composable Gadget

Abstract

Masking has been recognized as a sound and secure countermeasure for cryptographic implementations, protecting against physical side-channel attacks. Even though many different masking schemes have been presented over time, design and implementation of protected cryptographic Integrated Circuits (ICs) remains a challenging task. More specifically, correct and efficient implementation usually requires manual interactions accompanied by longstanding experience in hardware design and physical security. To this end, design and implementation of masked hardware often proves to be an error-prone task for engineers and practitioners. As a result, our novel tool for automated generation of masked hardware (AGEMA) allows even inexperienced engineers and hardware designers to create secure and efficient masked cryptograhic circuits originating from an unprotected design. More precisely, exploiting the concepts of Probe-Isolating Non-Interference (PINI) for secure composition of masked circuits, our tool provides various processing techniques to transform an unprotected design into a secure one, eventually accelerating and safeguarding the process of masking cryptographic hardware. Ultimately, we evaluate our tool in several case studies, emphasizing different trade-offs for the transformation techniques with respect to common performance metrics, such as latency, area, and
randomness.

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Published

2021-11-19

Issue

Section

Articles

How to Cite

Automated Generation of Masked Hardware. (2021). IACR Transactions on Cryptographic Hardware and Embedded Systems, 2022(1), 589-629. https://doi.org/10.46586/tches.v2022.i1.589-629