Fast FPGA Implementations of Diffie-Hellman on the Kummer Surface of a Genus-2 Curve

Authors

  • Philipp Koppermann Fraunhofer Research Institution AISEC, Munich
  • Fabrizio De Santis Siemens AG, Corporate Technology, Munich
  • Johann Heyszl Fraunhofer Research Institution AISEC, Munich
  • Georg Sigl Fraunhofer Research Institution AISEC, Munich; Technische Universität München, EI SEC, Munich

DOI:

https://doi.org/10.13154/tches.v2018.i1.1-17

Keywords:

Diffie-Hellman key exchange, hyperelliptic curve cryptography, Kummer surface, FPGA, Zynq, low-latency, high-throughput, fault countermeasure

Abstract

We present the first hardware implementations of Diffie-Hellman key exchange based on the Kummer surface of Gaudry and Schost’s genus-2 curve targeting a 128-bit security level. We describe a single-core architecture for lowlatency applications and a multi-core architecture for high-throughput applications. Synthesized on a Xilinx Zynq-7020 FPGA, our architectures perform a key exchange with lower latency and higher throughput than any other reported implementation using prime-field elliptic curves at the same security level. Our single-core architecture performs a scalar multiplication with a latency of 82 microseconds while our multicore architecture achieves a throughput of 91,226 scalar multiplications per second. When compared to similar implementations of Microsoft’s Fourℚ on the same FPGA, this translates to an improvement of 48% in latency and 40% in throughput for the single-core and multi-core architecture, respectively. Both our designs exhibit constant-time execution to thwart timing attacks, use the Montgomery ladder for improved resistance against SPA, and support a countermeasure against fault attacks.

Published

2018-02-14

How to Cite

Koppermann, P., De Santis, F., Heyszl, J., & Sigl, G. (2018). Fast FPGA Implementations of Diffie-Hellman on the Kummer Surface of a Genus-2 Curve. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2018(1), 1–17. https://doi.org/10.13154/tches.v2018.i1.1-17

Issue

Section

Articles