3-Share Threshold Implementation of AES S-box without Fresh Randomness

Authors

  • Takeshi Sugawara The University of Electro-Communications, Tokyo

DOI:

https://doi.org/10.13154/tches.v2019.i1.123-145

Keywords:

Threshold Implementation, AES, Side-channel Attack, Changing of the Guards, Differential Power Analysis

Abstract

Threshold implementation is studied as a countermeasure against sidechannel attack. There had been no threshold implementation for the AES and Keccak S-boxes that satisfies an important property called uniformity. In the conventional implementations, intermediate values are remasked to compensate for the lack of uniformity. The remasking consumes thousands of fresh random bits and its implementation cost is a serious concern. Daemen recently proposed a 3-share uniform threshold implementation of the Keccak S-box. This is enabled by a new technique called the changing of the guards which can be applied to any invertible functions. Subsequently, Wegener et al. proposed a 4-share threshold implementation of the AES S-box based on the changing of the guards technique. However, a 3-share threshold implementation of AES S-box remains open. The difficulty stays in 2-input multiplication, used in decomposed S-box representations, which is non-invertible because of different input and output sizes. In this study, this problem is addressed by introducing a certain generalization of the changing of the guards technique. The proposed method provides a generic way to construct a uniform sharing for a target function having different input and output sizes. The key idea is to transform a target function into an invertible one by adding additional inputs and outputs. Based on the proposed technique, the first 3-share threshold implementation of AES S-box without fresh randomness is presented. Performance evaluation and simulation-based leakage assessment of the implementation are also presented.

Published

2018-11-09

Issue

Section

Articles

How to Cite

3-Share Threshold Implementation of AES S-box without Fresh Randomness. (2018). IACR Transactions on Cryptographic Hardware and Embedded Systems, 2019(1), 123-145. https://doi.org/10.13154/tches.v2019.i1.123-145