Secure Physical Enclosures from Covers with Tamper-Resistance

  • Vincent Immler Fraunhofer Institute for Applied and Integrated Security (AISEC)
  • Johannes Obermaier Fraunhofer Institute for Applied and Integrated Security (AISEC)
  • Kuan Kuan Ng DSO National Laboratories
  • Fei Xiang Ke DSO National Laboratories
  • JinYu Lee DSO National Laboratories
  • Yak Peng Lim DSO National Laboratories
  • Wei Koon Oh DSO National Laboratories
  • Keng Hoong Wee DSO National Laboratories
  • Georg Sigl Fraunhofer Institute for Applied and Integrated Security (AISEC); Technical University Munich (TUM)
Keywords: Tamper-resistance, Physical Unclonable Function (PUF), Secure Bootstrap, Security Standards, FIPS 140-2, Higher-Order Alphabet PUF (HOA PUF)

Abstract

Ensuring physical security of multiple-chip embedded systems on a PCB is challenging, since the attacker can control the device in a hostile environment. To detect physical intruders as part of a layered approach to security, it is common to create a physical security boundary that is difficult to penetrate or remove, e.g., enclosures created from tamper-respondent envelopes or covers. Their physical integrity is usually checked by active sensing, i.e., a battery-backed circuit continuously monitors the enclosure. However, adoption is often hampered by the disadvantages of a battery and due to specialized equipment which is required to create the enclosure. In contrast, we present a batteryless tamper-resistant cover made from standard flexPCB technology, i.e., a commercially widespread, scalable, and proven technology. The cover comprises a fine mesh of electrodes and an evaluation unit underneath the cover checks their integrity by detecting short and open circuits. Additionally, it measures the capacitances between the electrodes of the mesh. Once its preliminary integrity is confirmed, a cryptographic key is derived from the capacitive measurements representing a PUF, to decrypt and authenticate sensitive data of the enclosed system. We demonstrate the feasibility of our concept, provide details on the layout, electrical properties of the cover, and explain the underlying security architecture. Practical results including statistics over a set of 115 flexPCB covers, physical attacks, and environmental testing support our design rationale. Hence, our work opens up a new direction of counteracting physical tampering without the need of batteries, while aiming at a physical security level comparable to FIPS 140-2 level 3.

Published
2018-11-09
How to Cite
Immler, V., Obermaier, J., Ng, K., Ke, F., Lee, J., Lim, Y., Oh, W., Wee, K., & Sigl, G. (2018). Secure Physical Enclosures from Covers with Tamper-Resistance. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2019(1), 51-96. https://doi.org/10.13154/tches.v2019.i1.51-96
Section
Articles