SHAPER: A General Architecture for Privacy-Preserving Primitives in Secure Machine Learning

Authors

  • Ziyuan Liang Zhejiang University, Hangzhou, China
  • Qi’ao Jin Zhejiang University, Hangzhou, China
  • Zhiyong Wang Zhejiang University, Hangzhou, China
  • Zhaohui Chen Peking University, Beijing, China; DAMO Academy, Alibaba group, Beijing, China; Hupan Lab, Hangzhou, China
  • Zhen Gu DAMO Academy, Alibaba group, Beijing, China; Hupan Lab, Hangzhou, China; Tsinghua University, Beijing, China
  • Yanhheng Lu Hupan Lab, Hangzhou, China; Alibaba Group, Shanghai, China
  • Fan Zhang Zhejiang University, Hangzhou, China

DOI:

https://doi.org/10.46586/tches.v2024.i2.819-843

Keywords:

Privacy-Preserving Machine Learning, Multi-Party Computation, Additive Homomorphic Encryption, Hardware Accelerator

Abstract

Secure multi-party computation and homomorphic encryption are two primary security primitives in privacy-preserving machine learning, whose wide adoption is, nevertheless, constrained by the computation and network communication overheads. This paper proposes a hybrid Secret-sharing and Homomorphic encryption Architecture for Privacy-pERsevering machine learning (SHAPER). SHAPER protects sensitive data in encrypted or randomly shared domains instead of relying on a trusted third party. The proposed algorithm-protocol-hardware co-design methodology explores techniques such as plaintext Single Instruction Multiple Data (SIMD) and fine-grained scheduling, to minimize end-to-end latency in various network settings. SHAPER also supports secure domain computing acceleration and the conversion between mainstream privacy-preserving primitives, making it ready for general and distinctive data characteristics. SHAPER is evaluated by FPGA prototyping with a comprehensive hyper-parameter exploration, demonstrating a 94x speed-up over CPU clusters on large-scale logistic regression training tasks.

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Published

2024-03-12

Issue

Section

Articles

How to Cite

SHAPER: A General Architecture for Privacy-Preserving Primitives in Secure Machine Learning. (2024). IACR Transactions on Cryptographic Hardware and Embedded Systems, 2024(2), 819-843. https://doi.org/10.46586/tches.v2024.i2.819-843