Protecting Dilithium against Leakage

Revisited Sensitivity Analysis and Improved Implementations


  • Melissa Azouaoui NXP Semiconductors, Eindhoven, Netherlands
  • Olivier Bronchain NXP Semiconductors, Eindhoven, Netherlands; UCLouvain, Ottignies-Louvain-la-Neuve, Belgium
  • Gaëtan Cassiers UCLouvain, Ottignies-Louvain-la-Neuve, Belgium; Graz University of Technology, Graz, Austria; Lamarr Security Research, Graz, Austria
  • Clément Hoffmann UCLouvain, Ottignies-Louvain-la-Neuve, Belgium
  • Yulia Kuzovkova NXP Semiconductors, Eindhoven, Netherlands
  • Joost Renes NXP Semiconductors, Eindhoven, Netherlands
  • Tobias Schneider NXP Semiconductors, Eindhoven, Netherlands
  • Markus Schönauer NXP Semiconductors, Eindhoven, Netherlands
  • François-Xavier Standaert
  • Christine van Vredendaal NXP Semiconductors, Eindhoven, Netherlands



CRYSTALS-Dilithium, Lattice-Based Cryptography, Post-Quantum Cryptography, Signatures, Side-Channel Countermeasures, Masking


CRYSTALS-Dilithium has been selected by the NIST as the new standard for post-quantum digital signatures. In this work, we revisit the side-channel countermeasures of Dilithium in three directions. First, we improve its sensitivity analysis by classifying intermediate computations according to their physical security requirements. Second, we provide improved gadgets dedicated to Dilithium, taking advantage of recent advances in masking conversion algorithms. Third, we combine these contributions and report performance for side-channel protected Dilithium implementations. Our benchmarking results additionally put forward that the randomized version of Dilithium can lead to significantly more efficient implementations (than its deterministic version) when side-channel attacks are a concern.




How to Cite

Azouaoui, M., Bronchain, O., Cassiers, G., Hoffmann, C., Kuzovkova, Y., Renes, J., … van Vredendaal, C. (2023). Protecting Dilithium against Leakage: Revisited Sensitivity Analysis and Improved Implementations. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2023(4), 58–79.