1.
The SPEEDY Family of Block Ciphers: Engineering an Ultra Low-Latency Cipher from Gate Level for Secure Processor Architectures. TCHES [Internet]. 2021 Aug. 11 [cited 2024 Nov. 23];2021(4):510-45. Available from: https://tches.iacr.org/index.php/TCHES/article/view/9074