“High-Speed Instruction-Set Coprocessor for Lattice-Based Key Encapsulation Mechanism: Saber in Hardware”. IACR Transactions on Cryptographic Hardware and Embedded Systems 2020, no. 4 (August 26, 2020): 443–466. Accessed November 21, 2024. https://tches.iacr.org/index.php/TCHES/article/view/8690.