SASDRICH, P.; BILGIN, B.; HUTTER, M.; MARSON, M. E. . Low-Latency Hardware Masking with Application to AES. IACR Transactions on Cryptographic Hardware and Embedded Systems, [S. l.], v. 2020, n. 2, p. 300–326, 2020. DOI: 10.13154/tches.v2020.i2.300-326. Disponível em: https://tches.iacr.org/index.php/TCHES/article/view/8553. Acesso em: 2 dec. 2022.