[1]
Leander, G. et al. 2021. The SPEEDY Family of Block Ciphers: Engineering an Ultra Low-Latency Cipher from Gate Level for Secure Processor Architectures. IACR Transactions on Cryptographic Hardware and Embedded Systems. 2021, 4 (Aug. 2021), 510–545. DOI:https://doi.org/10.46586/tches.v2021.i4.510-545.