[1]
Sinha Roy, S. and Basso, A. 2020. High-speed Instruction-set Coprocessor for Lattice-based Key Encapsulation Mechanism: Saber in Hardware. IACR Transactions on Cryptographic Hardware and Embedded Systems. 2020, 4 (Aug. 2020), 443–466. DOI:https://doi.org/10.13154/tches.v2020.i4.443-466.